Luis Pazzanese

Luis Fernando Pazzanese Pinheiro

Computer Engineering student at Insper, graduating in December 2028. I build embedded systems, cloud infrastructure and tools with AI.

Internship · 30 h/week · São Paulo or abroad · available now · English C1

Highlights

  • Air Mouse

    Controls a computer with hand gestures, using a motion sensor and a real-time operating system on a microcontroller.

    Technical details
    • MPU6050 IMU sampled at 100 Hz over I2C, fused into orientation with a Madgwick-based AHRS; 4-byte binary protocol to a Python host.
    • Four FreeRTOS tasks decoupled by three queues and one semaphore on an RP2350 (dual Cortex-M33); flick gesture with refractory-period debouncing.
  • Block diagram of the stepper IP core: synchroniser, control FSM, ramp, phase accumulator, sequencer, coils

    Stepper motor controller in hardware

    A hardware block written in VHDL that drives a stepper motor with smooth acceleration, verified by an automatic simulation suite.

    Technical details
    • Step rate from a DDS-style phase accumulator, so the trapezoidal ramp costs one adder and no divider; braking point found by mirroring the ramp.
    • Single 50 MHz clock domain with clock enables and two-flop synchronisers; self-checking testbench with 7 cases; +13 ns setup slack, 168 ALMs on a Cyclone V (DE10-Standard).
  • Lastro SDR app: map of São Paulo with matching listings and the AI chat panel

    Real interface; the assistant’s reply in this screenshot is simulated.

    AI sales assistant

    Built in one day at a hackathon: a chat powered by AI that qualifies home buyers, shows matching listings on a map and hands each lead to a broker.

    Technical details
    • Next.js + TypeScript on Vercel; Anthropic API with tool use (search listings, register lead) driving the conversation; Leaflet map; internal lead board for brokers.

Path so far

  1. 2023

    Exchange programmes in Cambridge, Canada and at MIT NuVu (2019); a year in Poliedro’s ITA-track class.

    Technical details

    Before university

    • Studied abroad three times during the second year of high school (2019) — six months at CATS College Cambridge (UK), a month at ELS Language Centers (Canada) and a month at the MIT NuVu Program (USA), where I built a retractable helmet that shields the wearer from acid rain. That is where the English comes from.
    • Spent a year in the ITA-track class at Poliedro (São José dos Campos) — the entrance track for Brazil’s most selective engineering school — before joining Insper.
    Luis at the MIT NuVu studio, 2019
  2. 2023–2028

    Computer Engineering at Insper — 6th semester, graduating in December 2028.

    Technical details

    BSc in Computer Engineering — Insper

    Currently in the 6th semester; expected graduation Dec 2028.

    2024.1 — Software Design · Instrumentation & Measurement

    2024.2 — Electrical Drives · Data Science

    2025.1 — Elements of Computing Systems · Computational Robotics · Agile Collaborative Development

    2025.2 — Physical Layer of Computing · Modelling & Control · Web Technologies

    2026.1 — Embedded Computing · Hardware-Software Systems · Programming Challenges

    2026.2 — Computer Design · Cloud Computing · Embedded Linux and System on Chip (elective)

  3. 2025

    Technology intern at Zagros Capital: automated report consolidation and built the fund dashboard used by the firm’s president and vice-president.

    Technical details

    Technology Intern (Back Office) — Zagros Capital

    Independent real estate asset manager in São Paulo, R$2B+ under management, with two listed funds (GGRC11, ZAGH11). Internship alongside classes in 2025; the code is internal.

    • Replaced the manual consolidation of fund reports with Python scrapers that pull every quarterly report since each fund’s inception and merge the metrics into Excel sheets grouped by fund type (CRI-backed REITs, FIDCs and others).
    • Built the Streamlit dashboard the firm’s president and vice-president used to follow fund values: a long-polling job captures the previous day’s NAV PDF every morning and updates the figures with no manual steps.
    • Gave the team a single always-current view of holdings by building interactive per-asset charts and replicating them across the firm’s entire fund portfolio.
  4. 2025–2026

    CTF competitor at Insper SEC, the university’s cybersecurity club.

    Technical details

    CTF competitor — Insper SEC

    Insper’s cybersecurity club. Left to free up time for the hardware projects below.

    • Competed in the club’s internal CTFs for six months to stay at the top of the scoreboard — mostly web exploitation (SQL injection, XSS, SSRF), with some crypto and misc.
  5. 2026

    Six firmware projects in C with FreeRTOS; the Air Mouse controls a computer by gestures.

    Technical details

    Embedded Systems — six open-source firmware projects — Insper

    Course projects on the RP2350 (dual Cortex-M33), all in C with the Pico SDK. The three below are the ones worth reading.

    • Air Mouse — MPU6050 IMU sampled at 100 Hz over I2C, fused into orientation with the Madgwick-based Fusion AHRS and streamed as a 4-byte binary protocol to a Python host that moves the cursor. Four FreeRTOS tasks decoupled by three queues and one semaphore; a flick gesture clicks, with refractory-period debouncing.

      repo: pico-mpu-rtos · C · FreeRTOS · I2C · AHRS

    • Touchscreen Stepper Controller — Custom ILI9341 240×320 TFT driver plus 4-wire resistive touch read through the ADC (64-sample averaging, pressure gate), driving a unipolar stepper in half-step mode with an animated direction indicator.

      repo: pico-expert · C · SPI · ADC · GPIO

    • Ultrasonic Ranger — HC-SR04 ranging that never blocks: trigger via SDK alarms, echo timed with rising/falling-edge GPIO IRQs and time_us_64(), a 50 ms watchdog alarm flags lost echoes, and the period is reconfigurable over a serial CLI.

      repo: pico-timer · C · timers · GPIO IRQ

    also: RTOS Multi-task System · ADC Pipeline · IRQ Buzzer

    All repositories

  6. 2026

    In one day, built an AI assistant that qualifies home buyers and hands them to brokers.

    Technical details

    AI sales assistant for a proptech — built in one day — Hackathon Lastro

    • Shipped, solo and in one day, a Next.js app for Lastro’s hackathon: an Anthropic-powered chat that qualifies leads by asking the right questions, a map of matching listings, and an internal board that routes each lead to a broker. Did not place; the code is public.

    Source

  7. 2026–

    Designing a CPU in VHDL, building a cloud from scratch (OpenStack → AWS) and giving a robot spider a head.

    Technical details

    Hardware design and cloud infrastructure — in progress — Insper

    What this semester is producing. The stepper IP is done; the CPU and the spider are in progress.

    • Building a MIPS CPU in VHDL on a Terasic DE0-CV (Cyclone V) for the Computer Design course, with Lenny Wajcberg — ALU, register file, control unit, instruction and data memory, R/I/J-type instructions, each block verified with its own testbench; then writing assembly against it (functions, stack, load/store). Repo goes public when the course ends (Dec 2026).
    • Cloud Computing course, built from bare metal up: MAAS and Juju provisioning, an OpenStack private cloud, Docker/Kubernetes, and the full AWS Academy track (VPC, EC2, IAM, S3, Lambda); the group final project builds a scalable infrastructure by hand and then automates it with Terraform and CI/CD.
    • Independent project with Felipe Suarez on a Terasic Spider hexapod (DE0-Nano-SoC, Cyclone V SoC), proposed by the lab professor: a pan/tilt head with a face display, light/distance/presence sensors and a behaviour policy running on the ARM HPS. The code is AI-generated on purpose — we run it the way Anthropic documents for Claude Code: a CLAUDE.md rulebook, architecture decision records and an Obsidian knowledge vault the model reads every session; we decide, measure on the bench and review. Just started.
    • Stepper motor IP core — Elective deliverable (Embedded Linux and SoC): a VHDL IP core driving a unipolar stepper from a DE10-Standard (Cyclone V). Step rate comes from a phase accumulator (DDS-style), so a trapezoidal acceleration ramp costs one adder and no divider; braking distance is found by mirroring the ramp instead of computing v²/2a. Single 50 MHz clock domain with clock enables, two-flop synchronisers, a self-checking testbench with 7 cases, and +13 ns setup slack / 168 ALMs after synthesis. The README explains every decision.

      repo: vhdl-stepper-ip · VHDL · Cyclone V · Quartus · ModelSim

    Spider repo

    Terasic Spider hexapod on a DE0-Nano-SoC

Also on GitHub

  • Ninja Card Game — State-machine card-matching reflex game. · Python · Pygame
  • Retro Gaming Console — Batocera emulation setup on a Raspberry Pi 5. · Linux · Batocera

Skills

Programming
Python · C · TypeScript · Git · Linux
Hardware
VHDL · FPGA · ARM microcontrollers · FreeRTOS
Cloud
AWS (Cloud Practitioner certification — exam by Dec 2026) · OpenStack · Docker · Kubernetes · Terraform
AI
LLM applications (Anthropic API) · AI-assisted development (Claude Code)
Languages
Portuguese (native) · English (C1, TOEFL)

Contact

Email
luispazzanese@gmail.com
LinkedIn
linkedin.com/in/luis-pazzanese
GitHub
github.com/LuisPazzanese
Location
São Paulo, Brazil